Introduction
This page is a quick start guide to custom IP cores. More detailed information about custom IP cores can be found in the Guide to defining a custom Xillybus IP core.
The correct way to start with Xillybus is explained on a different page. In particular, the starter project for the FPGA is a demo bundle, which can be downloaded from Xillybus' website.
At a later stage, you may want to modify the IP core. For example, you may want to add several streams that are suitable for your application. This is the purpose of the IP Core Factory: It's a web application that allows you to create a custom IP core according to your needs. The IP core is configured with this tool, and the IP Core bundle is then downloaded as a zip file.
The meaning of a IP core's parameters is explained in detail in the Guide to defining a custom Xillybus IP core.
Note that the same driver for Linux or Windows works with all custom IP cores. The driver obtains the information about the IP core from the IP core itself upon initialization. There is hence no need to install anything new on the computer after the initial installation of the driver.
Also note that a matching demo bundle is required to use the zip file from the IP Core Factory. This is one of the reasons for starting with the demo bundle, as suggested on a separate page.
Integrating the custom IP core into the demo bundle
After downloading the custom IP core from the IP Core Factory, the demo bundle needs to be modified to include this IP core. This requires a few simple steps, which are listed below.
Similar instructions are written in README.TXT, which is part of the IP Core Factory's zip file. This README file also contains other useful information:
- The Core ID, which is a five digit number. This number is a unique identifier for the IP core. The Core ID should be mentioned when requesting a pricing quote.
- The IP core's devices files are listed. The technical details about each device file is also shown. This is the accurate information about the IP core's real characteristics.
In order to integrate the custom IP core into the demo bundle, follow these steps:
- Replace two files in the demo bundle with the files in the IP Core bundle: xillybus.v and xillybus_core.v (or xillybus_xl_core.v / xillybus_xxl_core.v).
- Replace the IP core itself. This file is in the demo bundle's subdirectory with the name core/. The file to replace is something like xillybus_core.ngc, xillybus_core.edf, xillybus_core.qxp or xillybus_core.vqm.
- Edit xillydemo.v (or xillydemo.vhd) in order to integrate the desired application with this custom IP core. For guidance, look in the "instantiation templates" directory of the IP core bundle. The file named template.v (or template.vhd) contains the instantiation template that should be followed.
Note that there are no FIFOs in the instantiation template. It's nevertheless recommended to use FIFOs for the interaction with Xillybus' IP core, as suggested on the page about data acquisition.
General guidelines
This a list of general advice that can save time when working with custom IP cores:
- Read the Guide to defining a custom Xillybus IP core.
- Use the "Autoset internals" option in the IP Core Factory. The possibility to turn this option off is intended for experienced Xillybus users. Otherwise, odds are that the web tool's automatic decisions will be better.
- Nevertheless read the README file in order to learn what decisions the web tool did.
- In particular, the is no need for a relation between the size of each DMA buffer and the data that is intended for transmission. If you're tempted to do this, these explanations about data acquisition may help.
- In the IP Core Factory, select the "Use" (from the drop-down menu) that best matches your application. This determines, among others, if the device file will be a synchronous stream or an asynchronous stream. These terms are explained briefly on a different page, and in more detail in the documentation.